Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 41
Q861:
What happens in the RAS only refresh cycle in DRAM?
A. CAS goes low before RAS
B. RAS goes low and latches the row address
C. CAS remains active throughout
D. An internal counter provides the row address
Correct Answer:
B
Chapter: 41
Q862:
In which ROM type is the storage cell implemented using a MOS transistor?
A. Mask ROM
B. PROM
C. EPROM
D. EEPROM
Correct Answer:
A
Chapter: 41
Q863:
What is the main feature of Flash memory that makes it ideal for storing data?
A. Volatile memory
B. High read/write speed
C. Non-volatile and high density
D. Permanent data storage
Correct Answer:
C
Chapter: 41
Q864:
What type of PROM allows erasing of stored data with UV light?
A. Mask ROM
B. PROM
C. UV EPROM
D. EEPROM
Correct Answer:
C
Chapter: 41
Q865:
How many address lines are required for a 2 KB EPROM?
A. 8
B. 10
C. 16
D. 32
Correct Answer:
B
Chapter: 42
Q866:
What is the primary function of a FLASH memory array?
A. Store multiple data bits
B. Select and read specific data cells
C. Connect transistors in series
D. Manage data transfer rates
Correct Answer:
B
Chapter: 42
Q867:
In a FLASH memory array, what activates a row of transistors?
A. Column select line
B. Control gate of MOS transistors
C. Source terminal connection
D. Row select line
Correct Answer:
D
Chapter: 42
Q868:
What happens when a column select line is activated but the transistor gate has a stored charge?
A. Current flows through the transistor
B. No current flows through the transistor
C. Voltage drop across the active load is produced
D. The comparator output is a 0
Correct Answer:
B
Chapter: 42
Q869:
In FLASH memory, what determines if current flows through a column line?
A. The charge stored in the transistor gate
B. The row select line activation
C. The column select line activation
D. The voltage drop across the active load
Correct Answer:
A
Chapter: 42
Q870:
Which type of memory is non-volatile and uses a latch to store a bit?
A. Static RAM (SRAM)
B. Dynamic RAM (DRAM)
C. ROM
D. EEPROM
Correct Answer:
A
Chapter: 42
Q871:
What characteristic differentiates DRAM from SRAM?
A. DRAM is high density, SRAM is low density
B. DRAM requires a transistor and capacitor, SRAM requires six transistors
C. DRAM is non-volatile, SRAM is volatile
D. DRAM supports in-system write ability, SRAM does not
Correct Answer:
B
Chapter: 42
Q872:
What does a FIFO memory do?
A. Stores data randomly
B. Processes data at different rates
C. Stores data in a last-in, first-out manner
D. Transfers data in the order it is received
Correct Answer:
C
Chapter: 42
Q873:
How is FIFO memory typically implemented in a digital system?
A. Using shift registers and control circuitry
B. Using RAM with circular buffers
C. Using ROM with addressable cells
D. Using EEPROM with programmable logic
Correct Answer:
A
Chapter: 43
Q874:
What is the primary characteristic of a LIFO memory?
A. First In-First Out (FIFO)
B. Last In-First Out (LIFO)
C. Random Access
D. Circular Buffer
Correct Answer:
B
Chapter: 43
Q875:
How does a stack operation in LIFO memory work?
A. New data is added at the bottom
B. New data is added at the top
C. Old data is removed from the bottom
D. Data is stored in a random order
Correct Answer:
B
Chapter: 43
Q876:
What is the maximum number of 8-bit values that can be stored in a 5-register LIFO memory?
A. 3
B. 5
C. 8
D. 10
Correct Answer:
B
Chapter: 43
Q877:
In a RAM stack implementation, what role does the Stack Pointer Register play?
A. Stores data values
B. Points to the base address of RAM
C. Stores the address of the stack top
D. Keeps track of memory allocation
Correct Answer:
C
Chapter: 43
Q878:
What happens to the Stack Pointer Register after a value is read from the stack?
A. It is incremented
B. It is decremented
C. It remains unchanged
D. It resets to zero
Correct Answer:
B
Chapter: 43
Q879:
How does the total memory requirement of a computer system relate to its address and data bus size?
A. Larger address bus means more memory
B. Larger data bus means more memory
C. Smaller address bus limits memory
D. Smaller data bus limits memory
Correct Answer:
A
Chapter: 43
Q880:
What does a microprocessor with a 16-bit data bus allow you to access?
A. One byte of data
B. Two bytes of data
C. Four bytes of data
D. Eight bytes of data
Correct Answer:
B