Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 27
Q581:
What does a Synchronous Decade Counter count up to?
A. 1111
B. 1001
C. 1010
D. 1100
Correct Answer:
B
Chapter: 27
Q582:
What happens when a Synchronous Decade Counter reaches the state 1001?
A. Clears all flip-flops
B. Continues counting
C. Resets to state 0000
D. Stops counting
Correct Answer:
C
Chapter: 27
Q583:
How are the J-K inputs of the first flip-flop in a Decade Counter typically connected?
A. To logic low
B. To a clock signal
C. To logic high
D. To a Boolean function
Correct Answer:
C
Chapter: 27
Q584:
When does the output state of the second flip-flop in a Decade Counter change?
A. When F0 is 1 and F3 is 0
B. When F0 is 0 and F3 is 1
C. When F1 is 1
D. When F2 is 0
Correct Answer:
A
Chapter: 27
Q585:
What Boolean expression determines the inputs J-K of the third flip-flop in a Decade Counter?
A. F0 + F2
B. F0F1
C. F1 + F2
D. F0F3
Correct Answer:
B
Chapter: 27
Q586:
What Boolean expression determines the inputs J-K of the fourth flip-flop in a Decade Counter?
A. F0F1F2 + F0F3
B. F0 + F1 + F2
C. F1F2 + F0F3
D. F0F1F2 + F1F3
Correct Answer:
A
Chapter: 27
Q587:
What does a 3-bit Asynchronous Down-Counter do at interval t6 when configured for a truncated sequence?
A. Sets all flip-flops to 1
B. Toggles output to zero
C. Continues counting
D. Resets to state 000
Correct Answer:
A
Chapter: 27
Q588:
What component is necessary for a 4-bit Synchronous Binary Counter to operate properly?
A. A 2-input OR gate
B. A 3-input AND gate
C. A 4-input NOR gate
D. A flip-flop with delay
Correct Answer:
B
Chapter: 28
Q589:
What is the Modulus number in a Mod-n Synchronous Counter?
A. The number of states the counter can count
B. The number of flip-flops used
C. The number of clocks required
D. The frequency of the input clock
Correct Answer:
A
Chapter: 28
Q590:
What type of input does the 74HC163 Synchronous Counter use for resetting the counter output?
A. Active-high CLR
B. Active-low CLR
C. Active-high LOAD
D. Active-low LOAD
Correct Answer:
B
Chapter: 28
Q591:
What happens to the counter output when the CLR signal is active at interval t1?
A. The counter increments
B. The counter output is reset
C. The counter stops
D. The counter loads new data
Correct Answer:
B
Chapter: 28
Q592:
How is the 74HC163 Synchronous Counter loaded with 4-bit data?
A. By activating the CLR signal
B. By activating the LOAD signal
C. By deactivating the ENT signal
D. By deactivating the ENP signal
Correct Answer:
B
Chapter: 28
Q593:
What does the RCO output indicate in a 74HC163 counter?
A. The counter is disabled
B. The counter has reached its terminal count
C. The counter is reset
D. The counter is loaded with data
Correct Answer:
B
Chapter: 28
Q594:
What sequence does a cascaded decade counter count in?
A. 0001 to 1111
B. 0000 to 1001
C. 0000 to 1111
D. 0001 to 1001
Correct Answer:
B
Chapter: 28
Q595:
74HC163 has two enable input pins which are _______ and _________
A. ENP, ENT
B. ENI, ENC
C. ENP, ENC
D. ENT, ENI
Correct Answer:
A
Chapter: 28
Q596:
How is a MOD-7 counter implemented using the 74HC163?
A. By presetting the counter with 0000
B. By loading the counter with 1001
C. By resetting the counter at 1111
D. By clearing the counter at 1001
Correct Answer:
B
Chapter: 28
Q597:
What is the key difference between the 74HC161 and 74HC163 counters?
A. The 74HC161 has a synchronous clear input
B. The 74HC161 has an asynchronous clear input
C. The 74HC163 has a larger count sequence
D. The 74HC163 has an asynchronous load input
Correct Answer:
B
Chapter: 28
Q598:
How is the maximum count sequence of cascaded counters determined?
A. By the number of flip-flops used
B. By the initial count value
C. By the RCO output of the first counter
D. By the RCO output of the last counter
Correct Answer:
D
Chapter: 28
Q599:
What does an up-down counter do?
A. Only increments the count
B. Only decrements the count
C. Increments and decrements the count
D. Resets the count on command
Correct Answer:
C
Chapter: 29
Q600:
What does a Karnaugh Map help to simplify in Boolean algebra?
A. Logic gates
B. Boolean expressions
C. Arithmetic operations
D. Digital circuits
Correct Answer:
B