Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 30
Q621:
What does a Karnaugh Map help to simplify in Boolean algebra?
A. Logic gates
B. Boolean expressions
C. Arithmetic operations
D. Digital circuits
Correct Answer:
B
Chapter: 30
Q622:
How many cells are there in a 3-variable Karnaugh Map?
A. 4
B. 8
C. 16
D. 32
Correct Answer:
C
Chapter: 30
Q623:
At time interval t9, what does the RCO signal indicate in the digital clock?
A. Terminal count of the tens counter
B. Terminal count of the units counter
C. Reset signal for the clock
D. Start signal for the next counter
Correct Answer:
B
Chapter: 30
Q624:
When does the units counter recycle to 0000 in the digital clock sequence?
A. At interval t10
B. At interval t11
C. At interval t19
D. At interval t1
Correct Answer:
A
Chapter: 30
Q625:
What is the role of the RCO signal in the digital clock circuit?
A. Enable the next counter
B. Reset the units counter
C. Increment the tens counter
D. Deactivate the J-K flip-flop
Correct Answer:
A
Chapter: 30
Q626:
How is the J-K flip-flop triggered in the hours unit counter circuit?
A. By a positive edge clock transition
B. By a negative edge clock transition
C. By a reset signal
D. By an RCO signal
Correct Answer:
B
Chapter: 30
Q627:
When does the J-K flip-flop output Q change to logic 1 in the hours counter circuit?
A. At interval t9
B. At interval t10
C. At interval t12
D. At interval t13
Correct Answer:
A
Chapter: 30
Q628:
What happens at interval t60 in the frequency counter timing diagram?
A. The units counter recycles to 0000
B. The tens counter increments to 0110
C. The NAND gate output is set to logic 1
D. The sampling interval is disabled
Correct Answer:
B
Chapter: 30
Q629:
How is the frequency of an unknown signal calculated using a frequency counter?
A. By counting the input signal pulses and dividing by sampling interval
B. By measuring the input signal voltage
C. By calculating the period of the signal
D. By adjusting the counter output
Correct Answer:
A
Chapter: 30
Q630:
What is the purpose of the crystal oscillator in the frequency counter circuit?
A. To generate accurate timing signals
B. To amplify the input signal
C. To reset the counter
D. To display the frequency
Correct Answer:
A
Chapter: 30
Q631:
How does the timing diagram in Figure 30.5b show the sampling interval pulse?
A. As an output of the J-K flip-flop
B. As an input to the AND gate
C. As a reset signal for the counter
D. As a display output
Correct Answer:
A
Chapter: 30
Q632:
In a sequential circuit the next state is determined by ________ and ________
A. State variable, current state
B. Current state, flip-flop output
C. Current state and external input
D. Input and clock signal applied
Correct Answer:
C
Chapter: 30
Q633:
In a synchronous counter, what is the role of the excitation inputs?
A. To change the state of memory elements on each clock transition
B. To provide the clock signal
C. To display the count on a 7-segment display
D. To enable the next counter
Correct Answer:
A
Chapter: 30
Q634:
What distinguishes a Mealy Machine from a Moore Machine in sequential circuits?
A. A Mealy Machine's output depends on current state and input
B. A Moore Machine's output depends on current state only
C. A Mealy Machine's output is always high
D. A Moore Machine's output is always low
Correct Answer:
A
Chapter: 30
Q635:
What is the first step in designing a synchronous counter?
A. Defining the state diagram
B. Implementing the state machine
C. Determining the input conditions
D. Designing the flip-flop circuit
Correct Answer:
A
Chapter: 30
Q636:
What does the state diagram of a synchronous up-counter show?
A. The sequence of states through which the counter progresses
B. The output of the state machine
C. The timing intervals of the clock
D. The input signal characteristics
Correct Answer:
A
Chapter: 31
Q637:
What does the Next-State Table list in a sequential circuit?
A. Present state and corresponding next state
B. Flip-flop inputs and outputs
C. Clock transition and state changes
D. Timing intervals and outputs
Correct Answer:
A
Chapter: 31
Q638:
What determines the number of flip-flops required in a sequential circuit?
A. Number of states
B. Number of logic gates
C. Number of Karnaugh maps
D. Number of clock transitions
Correct Answer:
A
Chapter: 31
Q639:
What does the J-K flip-flop transition table show?
A. Flip-flop input combinations and their effects
B. Karnaugh map simplifications
C. Next-state transitions
D. Logic gate configurations
Correct Answer:
A
Chapter: 31
Q640:
How can Karnaugh maps be used in sequential circuit design?
A. To simplify flip-flop input expressions
B. To derive timing diagrams
C. To list all possible states
D. To create the state diagram
Correct Answer:
A