Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 25
Q541:
What happens when both PRE and CLR inputs are set to 1?
A. Flip-flop remains unchanged
B. Flip-flop resets
C. Flip-flop presets
D. Clocked operation occurs
Correct Answer:
D
Chapter: 25
Q542:
What type of flip-flop is the 74HC74?
A. Master-Slave J-K flip-flop
B. Dual Positive-Edge D flip-flop
C. Dual Negative-Edge D flip-flop
D. Single Positive-Edge D flip-flop
Correct Answer:
B
Chapter: 25
Q543:
What is the main disadvantage of Master-Slave flip-flops compared to edge-triggered flip-flops?
A. They operate on half clock
B. They consume more power
C. They are more complex
D. They have longer delay
Correct Answer:
A
Chapter: 25
Q544:
What is the output of a Master-Slave flip-flop during the positive half of the clock cycle?
A. Changes with clock signal
B. Remains unchanged
C. Resets to zero
D. Presets to one
Correct Answer:
B
Chapter: 25
Q545:
What does the Propagation Delay tPLH measure?
A. Time from clock to output
B. Time from input to clock
C. Time from low to high output
D. Time from high to low output
Correct Answer:
C
Chapter: 25
Q546:
How is the Set-up Time defined for a flip-flop?
A. Minimum time input is held
B. Time between input changes
C. Time for input to stabilize
D. Time for clock to transition
Correct Answer:
A
Chapter: 25
Q547:
What is the Hold Time in a flip-flop?
A. Time after clock transition
B. Time before clock transition
C. Time between two clock pulses
D. Time between input changes
Correct Answer:
A
Chapter: 25
Q548:
What is the Maximum Clock Frequency of a flip-flop?
A. Highest frequency for inputs
B. Highest frequency for outputs
C. Highest reliable clock rate
D. Highest transition rate
Correct Answer:
C
Chapter: 25
Q549:
Following Is the circuit diagram of mono-stable device which gate will be replaced by the red colored rectangle in the circuit.
A. AND
B. NAND
C. NOR
D. XNOR
Correct Answer:
C
Chapter: 25
Q550:
What determines the unstable state duration in a Mono-stable device?
A. Clock input
B. Trigger pulse
C. Resistor and Capacitor
D. Feedback loop
Correct Answer:
C
Chapter: 25
Q551:
What type of One-Shot remains in its unstable state for a fixed period?
A. Retriggerable
B. Nonretriggerable
C. Edge-triggered
D. Pulse-triggered
Correct Answer:
B
Chapter: 25
Q552:
What happens in a retriggerable One-Shot if a new trigger is applied during the unstable state?
A. Resets to stable state
B. Retriggers the One-Shot
C. Ignores the new trigger
D. Extends the unstable state
Correct Answer:
B
Chapter: 26
Q553:
What does the 555 Timer function as in an Astable multivibrator?
A. Stable state device
B. Monostable
C. Clock generator
D. Oscillator
Correct Answer:
D
Chapter: 26
Q554:
What is the primary function of an Astable multivibrator?
A. Generate stable state
B. Produce a clock pulse
C. Continuously oscillate
D. Trigger external events
Correct Answer:
C
Chapter: 26
Q555:
What is a common issue in synchronous circuits related to clock signals?
A. Propagation delay
B. Clock skew
C. Metastability
D. Setup time violation
Correct Answer:
B
Chapter: 26
Q556:
What type of flip-flop is commonly used to avoid glitches due to race conditions?
A. Positive-edge triggered
B. Negative-edge triggered
C. Master-slave
D. T flip-flop
Correct Answer:
B
Chapter: 26
Q557:
What can cause the clock signals to arrive at different times in a synchronous circuit?
A. Signal attenuation
B. Propagation delay
C. Temperature change
D. Load variation
Correct Answer:
B
Chapter: 26
Q558:
How can problems caused by clock skew be eliminated?
A. Increasing clock speed
B. Equalizing clock delays
C. Reducing power supply voltage
D. Adding more flip-flops
Correct Answer:
B
Chapter: 26
Q559:
What type of counter changes states asynchronously?
A. Synchronous counter
B. Ripple counter
C. Ring counter
D. Johnson counter
Correct Answer:
B
Chapter: 26
Q560:
What determines the Modulus of a counter?
A. Number of flip-flops used
B. Clock frequency
C. Number of states
D. Input signal
Correct Answer:
A