Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Multiple Choice Questions
Q511: What is the primary goal of the Superscalar Design?
- A: To simplify instruction execution
- B: To increase clock speed
- C: To fetch and decode multiple instructions before execution
- D: To reduce hardware requirements
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C
Q512: How are instructions issued in Instruction Level Parallelism?
- A: Sequentially
- B: In parallel
- C: In random order
- D: In reverse order
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B
Q513: Which of the following is NOT a feature of pipelining?
- A: Single functional unit
- B: Instructions issued sequentially
- C: Instructions executed in parallel
- D: Minimal extra hardware required
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C
Q514: Which functional units are part of Superscalar Architecture?
- A: Integer Units, Floating Point Units, Branch Prediction Units
- B: ALU, Register File, Control Unit
- C: Cache, RAM, ROM
- D: GPU, DSP, FPU
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A
Q515: How does a VLIW processor handle instruction execution?
- A: At runtime
- B: Using branch prediction
- C: At compile time
- D: Using multiple pipelines
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C
Q516: What is the width of a typical VLIW instruction word?
- A: 32 bits
- B: 64 or 128 bits
- C: 16 bits
- D: 8 bits
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B
Q517: Superscalar processors use which technique to improve instruction-level parallelism?
- A: Data forwarding
- B: Pipelining
- C: Speculative execution
- D: All of the above
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D
Q518: Which processor is an example of a Superscalar architecture?
- A: Intel P6
- B: ARM Cortex-A9
- C: Intel 8086
- D: PowerPC 601
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A
Q519: Fill in the blank: _______ architecture uses very long instruction words to achieve instruction-level parallelism.
- A: Superscalar
- B: VLIW
- C: Pipelined
- D: RISC
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B
Q520: Fill in the blank: In a Superscalar processor, multiple _______ can execute in parallel.
- A: Pipelines
- B: ALUs
- C: Cache lines
- D: Registers
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A