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Important Digital Logic and Design Short Questions

Chapter: 24
Question 1:
Describe the behavior of a J-K flip-flop when both J and K are set to 1.
Answer: When J = 1 and K = 1, the J-K flip-flop toggles its output on each clock transition. The previous state of the flip-flop is inverted: if Q was 1 and Q was 0, it changes to Q = 0 and Q = 1, and vice versa.
Chapter: 24
Question 2:
What is a practical application of a J-K flip-flop as a sequence detector?
Answer: A J-K flip-flop can be used as a sequence detector to activate an output only when a specific sequence of inputs is detected, making it useful for pattern recognition in digital circuits.
Chapter: 24
Question 3:
How does a J-K flip-flop function as a frequency divider?
Answer: A J-K flip-flop can divide a clock frequency by 2 by toggling its output on each clock transition. Multiple J-K flip-flops can be connected to further divide the frequency into smaller values.
Chapter: 24
Question 4:
What is a shift register, and how is it related to J-K flip-flops?
Answer: A shift register is a set of J-K flip-flops connected in series that shift binary data left or right with each clock pulse. It is used for multiplication or division of binary numbers by shifting them by n bits.
Chapter: 24
Question 5:
Explain the use of J-K flip-flops in counters.
Answer: J-K flip-flops are used in counters to count up or down with each clock pulse. An up-counter increments its count while a down-counter decrements it, making J-K flip-flops essential for counting applications.
Chapter: 25
Question 6:
What are synchronous inputs in flip-flops?
Answer: Synchronous inputs (S-R, J-K, and D) affect flip-flop outputs only when a clock signal is applied. Without the clock, they have no effect.
Chapter: 25
Question 7:
How do asynchronous inputs differ from synchronous inputs in flip-flops?
Answer: Asynchronous inputs (Preset and Clear) change the flip-flop output to a known state independently of the clock signal.
Chapter: 25
Question 8:
What does setting the PRE input to 0 do in a J-K flip-flop?
Answer: Setting PRE to 0 sets the Q output to 1 and clears Q to 0, regardless of the CLR input.
Chapter: 25
Question 9:
What is the effect of setting the CLR input to 0 in a J-K flip-flop?
Answer: Setting CLR to 0 clears the Q output to 0 and sets Q to 1, regardless of the PRE input.
Chapter: 25
Question 10:
When both PRE and CLR inputs are set to 1, what is the operation mode of a J-K flip-flop?
Answer: Both PRE and CLR set to 1 allows the J-K flip-flop to operate in synchronous mode, where only clock signals affect the output.