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Important Digital Logic and Design Short Questions

Chapter: 22
Question 1:
How does the S-R latch with NOR gates differ from the NAND gate S-R latch?
Answer: The NOR gate S-R latch has active-high inputs and maintains the previous state with S=0 and R=0, while the NAND gate S-R latch has active-low inputs.
Chapter: 22
Question 2:
What is the effect of S=1 and R=1 in a NOR-based S-R latch?
Answer: The S=1 and R=1 input combination is invalid for a NOR-based S-R latch, resulting in undefined output states.
Chapter: 23
Question 3:
What is the primary function of an S-R latch in digital circuits?
Answer: The S-R latch prevents fluctuations in the output caused by switch bounce, ensuring a stable signal is sent to the digital circuit.
Chapter: 23
Question 4:
How does an S-R latch handle switch bounce?
Answer: The S-R latch stabilizes the output by maintaining a consistent state even if the switch input fluctuates momentarily due to bouncing.
Chapter: 23
Question 5:
In an S-R latch, what happens when both S and R inputs are high?
Answer: The output state of the S-R latch remains unchanged when both S and R inputs are high.
Chapter: 23
Question 6:
How does a gated S-R latch differ from a standard S-R latch?
Answer: A gated S-R latch includes an enable input that must be active for the latch to respond to S and R inputs.
Chapter: 23
Question 7:
What does the 'enable' input control in a gated S-R latch?
Answer: The 'enable' input allows the latch to change its state based on S and R inputs when set to active-high; otherwise, the output remains in its previous state.
Chapter: 23
Question 8:
What is the function of a D latch and how does it simplify S-R latches?
Answer: The D latch simplifies S-R latches by combining S and R inputs into a single D input, reducing the input combinations to two.
Chapter: 23
Question 9:
Describe the behavior of a gated D latch when the enable input is low.
Answer: When the enable input is low, the gated D latch holds its previous output regardless of the D input.
Chapter: 23
Question 10:
What is an edge-triggered flip-flop and how does it differ from a standard flip-flop?
Answer: An edge-triggered flip-flop changes its output state only on the edge of the clock signal (positive or negative), providing precise timing control compared to standard flip-flops.