Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 5
Q161:
What is the expression for a 2-input AND gate?
A. A + B
B. A . B
C. A - B
D. A / B
Correct Answer:
B
Chapter: 5
Q162:
Consider A=1,B=0,C=1. A, B and C represent the input of three bit NAND gate the output of the NAND gate will be _____
A. Zero
B. One
C. Undefined
D. No output as input is invalid
Correct Answer:
B
Chapter: 5
Q163:
What is the output of a NAND gate when all inputs are 1?
A. 1
B. zero
C. 10
D. 1
Correct Answer:
B
Chapter: 5
Q164:
The three fundamental gates are ___________
A. AND, NAND, XOR
B. OR, AND, NAND
C. NOT, NOR, XOR
D. NOT, OR, AND
Correct Answer:
D
Chapter: 430
Q165:
The total amount of memory that is supported by any digital system depends upon ______
A. The organization of memory
B. The structure of memory
C. The size of decoding unit
D. The size of the address bus of the microprocessor
Correct Answer:
D
Chapter: 429
Q166:
Stack is an acronym for _________
A. FIFO memory
B. LIFO memory
C. Flash Memory
D. Bust Flash Memory
Correct Answer:
B
Chapter: 0
Q167:
Addition of two octal numbers “36” and “71” results in ________
A. 213
B. 123
C. 127
D. 345
Correct Answer:
C
Chapter: 235
Q168:
___________ is one of the examples of synchronous inputs.
A. J-K input
B. EN input
C. Preset input (PRE)
D. Clear Input (CLR)
Correct Answer:
A
Chapter: 226
Q169:
__________occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay.
A. Race condition
B. Clock Skew
C. Ripple Effect
D. None of given options
Correct Answer:
B
Chapter: 332
Q170:
In a state diagram, the transition from a current state to the next state is determined by
A. Current state and the inputs
B. Current state and outputs
C. Previous state and inputs
D. Previous state and outputs
Correct Answer:
A
Chapter: 335
Q171:
________ is used to simplify the circuit that determines the next state.
A. State diagram
B. Next state table
C. State reduction
D. State assignment
Correct Answer:
D
Chapter: 0
Q172:
Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
A. 1100
B. 11
D. 1111
Correct Answer:
B
Chapter: 78
Q173:
The diagram given below represents __________
A. Demorgans law
B. Associative law
C. Product of sum form
D. Sum of product form
Correct Answer:
D
Chapter: 232
Q174:
The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________
A. Doesn’t have an invalid state
B. Sets to clear when both J = 0 and K = 0
C. It does not show transition on change in pulse
D. It does not accept asynchronous inputs
Correct Answer:
A
Chapter: 356
Q175:
A multiplexer with a register circuit converts _________
A. Serial data to parallel
B. Parallel data to serial
C. Serial data to serial
D. Parallel data to parallel
Correct Answer:
B
Chapter: 183
Q176:
A GAL is essentially a ________.
A. Non-reprogrammable PAL
B. PAL that is programmed only by the manufacturer
C. Very large PAL
D. Reprogrammable PAL
Correct Answer:
D
Chapter: 413
Q177:
in ____________, all the columns in the same row are either read or written.
A. Sequential Access
B. MOS Access
C. FAST Mode Page Access
D. None of given options
Correct Answer:
C
Chapter: 425
Q178:
In order to synchronize two devices that consume and produce data at different rates, we can use _________
A. Read Only Memory
B. Fist In First Out Memory
C. Flash Memory
D. Fast Page Access Mode Memory
Correct Answer:
B
Chapter: 228
Q179:
A positive edge-triggered flip-flop changes its state when ________________
A. Low-to-high transition of clock
B. High-to-low transition of clock
C. Enable input (EN) is set
D. Preset input (PRE) is set
Correct Answer:
A
Chapter: 0
Q180:
The decimal “17” in BCD will be represented as _________
A. 11101
B. 11011
C. 10111
D. 11110
Correct Answer:
C