Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Chapter: 24
Q581:
What does the output of the SAD (Skeleton Address Decoder) depend on?
A. The correct address and control signals
B. The voltage and current levels
C. The timing of the system clock
D. The data bus width
Correct Answer:
A
Chapter: 24
Q582:
How are input ports isolated from the data bus when not in use?
A. Using resistors
B. Using capacitors
C. Using tri-state buffers
D. Using latches
Correct Answer:
C
Chapter: 24
Q583:
In a typical I/O bus cycle, what does the CPU place on the address bus?
A. Control signals
B. Data
C. An address
D. Timing signals
Correct Answer:
C
Chapter: 24
Q584:
What does a latch do in the output port design?
A. Holds data temporarily
B. Amplifies the signal
C. Decodes the address
D. Isolates input data
Correct Answer:
A
Chapter: 24
Q585:
How many inputs does an address decoder have if it uses 8 address lines and 1 control line?
A. 7
B. 8
C. 9
D. 10
Correct Answer:
C
Chapter: 24
Q586:
What does the NUXI problem refer to?
A. A mismatch in voltage levels
B. Data transmission errors in big-endian and little-endian systems
C. Incorrect timing signals
D. A bus contention issue
Correct Answer:
B
Chapter: 24
Q587:
Which format causes the NUXI problem?
A. Little-endian
B. Big-endian
C. Serial format
D. Parallel format
Correct Answer:
B
Chapter: 24
Q588:
Fill in the blank: The address decoder output is only active when the correct ______ and control signals are present.
A. voltage
B. address
C. timing
D. data
Correct Answer:
B
Chapter: 24
Q589:
Fill in the blank: Latches are used to capture data from the ______ during an I/O write cycle.
A. control bus
B. address bus
C. data bus
D. timing signals
Correct Answer:
C
Chapter: 24
Q590:
Fill in the blank: In the FALCON-A CPU, 16-bit output ports use two 8-bit ______ to capture data.
A. decoders
B. buffers
C. registers
D. latches
Correct Answer:
C
Chapter: 25
Q591:
Which signal is used to read data from the input port in a parallel input design for FALCON-A?
A. IOR#
B. IOW#
C. MEMW#
D. STROBE#
Correct Answer:
A
Chapter: 25
Q592:
In a parallel input port design for FALCON-A, what type of bus signal is used for writing data?
A. MEMW#
B. IOR#
C. IOW#
D. ACKNLG#
Correct Answer:
C
Chapter: 25
Q593:
The switches S15...S0 in the FALCON-A example are used to simulate what?
A. Output data
B. Input data
C. LED output
D. Memory data
Correct Answer:
B
Chapter: 25
Q594:
What does partial decoding help reduce in a system's architecture?
A. CPU speed
B. Address decoder complexity
C. Data bus size
D. Control signal overhead
Correct Answer:
B
Chapter: 25
Q595:
The 'wrap around' effect in memory addressing occurs due to:
A. Using all address lines
B. Not using all address lines
C. Using multiplexed data buses
D. Memory-mapped I/O
Correct Answer:
B
Chapter: 25
Q596:
In data bus multiplexing, for an even address, which part of the CPU data bus is connected to the peripheral?
A. D<15..8>
B. D<7..0>
C. Control bus
D. Address bus
Correct Answer:
A
Chapter: 25
Q597:
In a generic I/O interface, how many consecutive addresses are used for the interface with a parallel printer?
A. 8
B. 16
C. 32
D. 64
Correct Answer:
A
Chapter: 25
Q598:
In the Centronics Parallel Printer Interface, which signal starts the data transfer to the printer?
A. STROBE#
B. BUSY
C. ACKNLG#
D. IOW#
Correct Answer:
A
Chapter: 25
Q599:
In the assembly code for monitoring the input port, what is the purpose of the 'jnz' instruction?
A. It halts the program
B. It causes the LEDs to blink
C. It repeats the loop until zero
D. It resets the input data
Correct Answer:
C
Chapter: 25
Q600:
What is the address of the 16-bit output port in the memory-mapped I/O example?
A. 7Eh
B. DEh
C. 00DFh
D. 00DEh
Correct Answer:
D