Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Chapter: 23
Q561:
What must be considered first in I/O subsystem design?
A. Data location
B. Data transfer
C. Synchronization
D. Data format
Correct Answer:
A
Chapter: 23
Q562:
How many basic synchronization schemes exist for I/O data transmission?
A. 2
B. 3
C. 4
D. 5
Correct Answer:
B
Chapter: 23
Q563:
What kind of synchronization is used when the master and slave operate with the same clock?
A. Synchronous
B. Asynchronous
C. Semi-synchronous
D. Mixed-synchronous
Correct Answer:
A
Chapter: 23
Q564:
Which I/O transfer method allows additional clock periods for data transfer completion?
A. Semi-synchronous
B. Asynchronous
C. Synchronous
D. Non-synchronous
Correct Answer:
A
Chapter: 23
Q565:
In asynchronous transmission, what is necessary for data transfer?
A. Handshaking signals
B. Matching clock speeds
C. No handshaking required
D. Immediate data transfer
Correct Answer:
A
Chapter: 23
Q566:
What is the advantage of serial communication over parallel communication?
A. Lower cost
B. Faster speed
C. Higher complexity
D. Shorter distance capability
Correct Answer:
A
Chapter: 23
Q567:
Which error occurs when a 0 is received instead of a stop bit?
A. Framing error
B. Parity error
C. Overrun error
D. Under-run error
Correct Answer:
A
Chapter: 23
Q568:
What is the function of the bus arbitration scheme?
A. Assigning bus control to devices
B. Managing data transfer speeds
C. Synchronizing data between CPU and I/O
D. Allocating memory addresses
Correct Answer:
A
Chapter: 23
Q569:
What is an example of a parallel communication system?
A. Printer data transfer
B. UART communication
C. USB data transfer
D. Hard drive transfers
Correct Answer:
A
Chapter: 23
Q570:
Which I/O bus is commonly used in modern computers?
A. PCI bus
B. SATA bus
C. USB bus
D. ISA bus
Correct Answer:
A
Chapter: 23
Q571:
Which type of transfer between CPU and I/O devices involves sending bits one by one?
A. Serial
B. Parallel
C. Half-duplex
D. Full-duplex
Correct Answer:
A
Chapter: 23
Q572:
Which signal is activated to latch incoming data during an asynchronous transfer?
A. Enable
B. Ready
C. Acknowledge
D. Complete
Correct Answer:
C
Chapter: 23
Q573:
In serial communication, what is used to synchronize transmission in synchronous mode?
A. Sync characters
B. Start bits
C. Stop bits
D. Parity bits
Correct Answer:
A
Chapter: 24
Q574:
What is the purpose of an I/O port?
A. To manage input/output data
B. To connect I/O devices to the computer bus
C. To act as a CPU cache
D. To store addresses
Correct Answer:
B
Chapter: 24
Q575:
Which bus is used to connect the CPU to I/O devices indirectly?
A. Data bus
B. Peripheral bus
C. Address bus
D. Memory bus
Correct Answer:
B
Chapter: 24
Q576:
In an I/O read cycle, what does the CPU expect from the selected input device?
A. Data
B. Control signals
C. Address
D. Voltage
Correct Answer:
A
Chapter: 24
Q577:
What must be matched in I/O port design to ensure proper communication with the CPU?
A. Voltage and frequency
B. Voltage and current
C. Logic levels and timing
D. Data size
Correct Answer:
C
Chapter: 24
Q578:
What are the two main functions built into I/O ports?
A. Address decoding and data capturing
B. Data transfer and voltage regulation
C. Memory allocation and data isolation
D. CPU control and power management
Correct Answer:
A
Chapter: 24
Q579:
What is the function of an address decoder in an I/O port?
A. To generate an address for the CPU
B. To decode system bus data
C. To ensure each port has a unique address
D. To store data in registers
Correct Answer:
C
Chapter: 24
Q580:
What type of logic circuit is used for address decoding?
A. Sequential logic
B. Combinational logic
C. Arithmetic logic
D. Memory circuit
Correct Answer:
B