Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Chapter: 12
Q341:
What operation does the ALSU perform for the 'not' instruction in step T3?
A. OR
B. NOT
C. ADD
D. AND
Correct Answer:
B
Chapter: 12
Q342:
Which register holds the instruction currently being executed in the data path?
A. MAR
B. MBR
C. PC
D. IR
Correct Answer:
D
Chapter: 12
Q343:
In structural RTL, what happens in step T4 for the 'addi' instruction?
A. First operand brought into ALSU
B. Operand c2 is sign extended
C. Result written to memory
D. Register C is cleared
Correct Answer:
B
Chapter: 12
Q344:
What is the function of the barrel shifter in the SRC processor?
A. Executes branch instructions
B. Performs arithmetic shifts
C. Enables instruction fetch
D. Generates control signals
Correct Answer:
B
Chapter: 12
Q345:
Structural RTL for arithmetic instructions involves control signals for which part of the processor?
A. ALU
B. Timing Step Generator
C. Memory Address Register
D. Program Counter
Correct Answer:
A
Chapter: 12
Q346:
What does the behavioral RTL focus on in processor design?
A. Hardware architecture
B. Timing step intervals
C. Instruction functionality
D. Control unit design
Correct Answer:
C
Chapter: 12
Q347:
Which instruction fetch step increments the Program Counter (PC)?
A. T1
B. T2
C. T0
D. T3
Correct Answer:
A
Chapter: 12
Q348:
In processor design, ISA includes decisions about ______.
A. Number and size of instructions
B. Data path interconnections
C. Control signals
D. Clock cycles
Correct Answer:
A
Chapter: 13
Q349:
What does the instruction brzr rb, rc do if the value in register rc is zero?
A. It branches to the address held in register rb.
B. It stops execution.
C. It resets the processor.
D. It saves the current address.
Correct Answer:
A
Chapter: 13
Q350:
Which register stores the return address in brlzr instruction?
A. rb
B. rc
C. ra
D. PC
Correct Answer:
C
Chapter: 13
Q351:
The structural RTL for shift instructions uses what type of hardware to manage multiple-bit shifts?
A. Multiplexer
B. ALSU
C. Barrel shifter
D. Cache memory
Correct Answer:
C
Chapter: 13
Q352:
What is the width of the FALCON-A processor bus?
A. 8-bits
B. 16-bits
C. 32-bits
D. 64-bits
Correct Answer:
B
Chapter: 13
Q353:
How many registers does the FALCON-A have compared to the SRC?
A. FALCON-A has 8 registers, SRC has 32 registers.
B. FALCON-A has 16 registers, SRC has 64 registers.
C. FALCON-A has 32 registers, SRC has 8 registers.
D. FALCON-A and SRC have the same number of registers.
Correct Answer:
A
Chapter: 13
Q354:
In FALCON-A, what is the purpose of registers A and AH?
A. They store 8-bit operands.
B. They store 16-bit operands.
C. They store the 32-bit result of multiplication/division operations.
D. They store addresses only.
Correct Answer:
C
Chapter: 13
Q355:
What does the mul instruction output in FALCON-A?
A. A 16-bit result
B. A 32-bit result with the higher 16-bits in register CH
C. A 64-bit result
D. A result stored entirely in register C
Correct Answer:
B
Chapter: 13
Q356:
What happens during step T5 in the structural RTL for the shr instruction?
A. Data is shifted left.
B. The contents of register ra are shifted right by one bit.
C. The contents of register rb are shifted right by N bits.
D. The contents of register rc are incremented.
Correct Answer:
C
Chapter: 13
Q357:
What does the div instruction in FALCON-A do in step T6?
A. It stores the remainder in register C.
B. It moves the quotient to register ra.
C. It transfers the remainder to the default register R[0].
D. It performs the multiplication of two registers.
Correct Answer:
C
Chapter: 13
Q358:
In the addi ra, rb, c1 instruction, what is the value of c1?
A. A constant value stored in the program counter
B. A constant value stored in the instruction
C. A 32-bit immediate value
D. A signed 5-bit immediate value
Correct Answer:
D
Chapter: 13
Q359:
How is sign extension performed for a 5-bit constant c1?
A. By copying the sign bit to the leftmost 11 positions.
B. By copying the constant to the rightmost 5 positions.
C. By copying the sign bit to the rightmost 8 positions.
D. By appending zeros to the rightmost position.
Correct Answer:
A
Chapter: 13
Q360:
Which instruction tests whether the contents of register ra are zero before jumping to a new address?
A. jnz
B. jpl
C. jz
D. jmi
Correct Answer:
C