Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Multiple Choice Questions
Q851: How is data erased from a UV EPROM?
- A: Electrically
- B: Ultraviolet light
- C: Magnetic fields
- D: High voltage
View Answer
B
Q852: What is the function of a Mask ROM in memory storage?
- A: Allows write operations
- B: Stores data permanently
- C: Provides volatile memory
- D: Allows in-circuit programming
View Answer
B
Q853: In which type of ROM does the programming process use a fusible link?
- A: Mask ROM
- B: PROM
- C: EPROM
- D: EEPROM
View Answer
B
Q854: What is stored in a Flash memory cell to represent a logic 1?
- A: Charge on floating gate
- B: No charge on floating gate
- C: Negative charge on control gate
- D: Positive charge on control gate
View Answer
B
Q855: During which operation is charge added to the floating gate in Flash memory?
- A: Programming Operation
- B: Read Operation
- C: Erase Operation
- D: Latch Operation
View Answer
A
Q856: What is the purpose of the erase operation in Flash memory?
- A: Add charge to the gate
- B: Remove charge from the gate
- C: Write new data
- D: Disable the memory cell
View Answer
B
Q857: What type of DRAM has operations synchronized with the microprocessor's clock signal?
- A: EDO DRAM
- B: Synchronous DRAM
- C: Fast Page Mode DRAM
- D: EEPROM
View Answer
B
Q858: Which ROM type allows for data to be electrically erased and reprogrammed?
- A: Mask ROM
- B: PROM
- C: EPROM
- D: EEPROM
View Answer
D
Q859: The high density FLASH memory cell is implemented using ______________
- A: 1 floating-gate MOS transistor
- B: 2 floating-gate MOS transistors
- C: 4 floating-gate MOS transistors
- D: 6 floating-gate MOS transistors
View Answer
A
Q860: Which refresh mode suspends read/write operations during the refresh cycle in DRAM?
- A: Burst Refresh Mode
- B: Distributed Refresh Mode
- C: RAS only Refresh
- D: CAS before RAS Refresh
View Answer
A