Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Multiple Choice Questions
Q631: How does the timing diagram in Figure 30.5b show the sampling interval pulse?
- A: As an output of the J-K flip-flop
- B: As an input to the AND gate
- C: As a reset signal for the counter
- D: As a display output
View Answer
A
Q632: In a sequential circuit the next state is determined by ________ and ________
- A: State variable, current state
- B: Current state, flip-flop output
- C: Current state and external input
- D: Input and clock signal applied
View Answer
C
Q633: In a synchronous counter, what is the role of the excitation inputs?
- A: To change the state of memory elements on each clock transition
- B: To provide the clock signal
- C: To display the count on a 7-segment display
- D: To enable the next counter
View Answer
A
Q634: What distinguishes a Mealy Machine from a Moore Machine in sequential circuits?
- A: A Mealy Machine's output depends on current state and input
- B: A Moore Machine's output depends on current state only
- C: A Mealy Machine's output is always high
- D: A Moore Machine's output is always low
View Answer
A
Q635: What is the first step in designing a synchronous counter?
- A: Defining the state diagram
- B: Implementing the state machine
- C: Determining the input conditions
- D: Designing the flip-flop circuit
View Answer
A
Q636: What does the state diagram of a synchronous up-counter show?
- A: The sequence of states through which the counter progresses
- B: The output of the state machine
- C: The timing intervals of the clock
- D: The input signal characteristics
View Answer
A
Q637: What does the Next-State Table list in a sequential circuit?
- A: Present state and corresponding next state
- B: Flip-flop inputs and outputs
- C: Clock transition and state changes
- D: Timing intervals and outputs
View Answer
A
Q638: What determines the number of flip-flops required in a sequential circuit?
- A: Number of states
- B: Number of logic gates
- C: Number of Karnaugh maps
- D: Number of clock transitions
View Answer
A
Q639: What does the J-K flip-flop transition table show?
- A: Flip-flop input combinations and their effects
- B: Karnaugh map simplifications
- C: Next-state transitions
- D: Logic gate configurations
View Answer
A
Q640: How can Karnaugh maps be used in sequential circuit design?
- A: To simplify flip-flop input expressions
- B: To derive timing diagrams
- C: To list all possible states
- D: To create the state diagram
View Answer
A