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Digital Logic and Design MCQs with Answers

Practice important Digital Logic and Design MCQs with answers and explanations.

Multiple Choice Questions

Q171: ________ is used to simplify the circuit that determines the next state.
  • A: State diagram
  • B: Next state table
  • C: State reduction
  • D: State assignment
View Answer
D

Q172: Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
  • A: 1100
  • B: 11
  • C: 0
  • D: 1111
View Answer
B

Q173: The diagram given below represents __________
  • A: Demorgans law
  • B: Associative law
  • C: Product of sum form
  • D: Sum of product form
View Answer
D

Q174: The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________
  • A: Doesn’t have an invalid state
  • B: Sets to clear when both J = 0 and K = 0
  • C: It does not show transition on change in pulse
  • D: It does not accept asynchronous inputs
View Answer
A

Q175: A multiplexer with a register circuit converts _________
  • A: Serial data to parallel
  • B: Parallel data to serial
  • C: Serial data to serial
  • D: Parallel data to parallel
View Answer
B

Q176: A GAL is essentially a ________.
  • A: Non-reprogrammable PAL
  • B: PAL that is programmed only by the manufacturer
  • C: Very large PAL
  • D: Reprogrammable PAL
View Answer
D

Q177: in ____________, all the columns in the same row are either read or written.
  • A: Sequential Access
  • B: MOS Access
  • C: FAST Mode Page Access
  • D: None of given options
View Answer
C

Q178: In order to synchronize two devices that consume and produce data at different rates, we can use _________
  • A: Read Only Memory
  • B: Fist In First Out Memory
  • C: Flash Memory
  • D: Fast Page Access Mode Memory
View Answer
B

Q179: A positive edge-triggered flip-flop changes its state when ________________
  • A: Low-to-high transition of clock
  • B: High-to-low transition of clock
  • C: Enable input (EN) is set
  • D: Preset input (PRE) is set
View Answer
A

Q180: The decimal “17” in BCD will be represented as _________
  • A: 11101
  • B: 11011
  • C: 10111
  • D: 11110
View Answer
C

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