Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Multiple Choice Questions
Q821: In floating-point addition, the last step is to:
- A: Normalize the sum
- B: Round off the result
- C: Check for overflow
- D: Unpack the fields
View Answer
C
Q822: What does the memory address register (MAR) contain?
- A: Data word
- B: Memory address
- C: Control signals
- D: Request signal
View Answer
B
Q823: The memory buffer register (MBR) is directly connected to the _______.
- A: Address bus
- B: Data bus
- C: Control signals
- D: CPU
View Answer
B
Q824: How many bits does a typical memory address range from 0 to?
- A: 2m-1
- B: 2^m-1
- C: 2m
- D: 2^(m-1)
View Answer
B
Q825: The register file contains how many 32-bit wide registers?
- A: 16
- B: 32
- C: 64
- D: 128
View Answer
B
Q826: When the REQUEST signal is high, it corresponds to a ______ operation.
- A: Read
- B: Write
- C: Reset
- D: Idle
View Answer
A
Q827: In the 1×8 Memory Cell Array, which signal is common to all cells?
- A: Select
- B: DataIn
- C: DataOut
- D: Read/Write
View Answer
A
Q828: The 4×8 Memory Cell Array arrangement is described as being in ______ dimensions.
- A: One
- B: Two
- C: Three
- D: Four
View Answer
B
Q829: The 64k×1 Static RAM Chip requires how many address lines?
- A: 8
- B: 16
- C: 32
- D: 64
View Answer
B
Q830: In a read operation of the SRAM cell, the data becomes available on the data bus after ______.
- A: Time "tAA"
- B: Time "tWR"
- C: Time "tAA" + "tWR"
- D: Immediately
View Answer
A