Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Chapter: 35
Q701:
In the following statement Z PIN 20 ISTYPE ‘reg.invert’; The keyword “reg.invert” indicates ________
A. An inverted register input
B. An inverted register input at pin 20
C. Active-high Registered Mode output
D. Active-low Registered Mode output
Correct Answer:
A
Chapter: 34
Q702:
What is the primary difference between the 74HC194 and other shift registers?
A. It has both parallel and serial input/output capability
B. It only has serial input capability
C. It is unidirectional
D. It operates on negative clock transitions
Correct Answer:
A
Chapter: 35
Q703:
What is the major application of a shift register?
A. Keyboard scanning
B. Logic gate simplification
C. Converting between parallel and serial data
D. Memory storage
Correct Answer:
C
Chapter: 35
Q704:
Which register replaces a Multiplexer-Register combination to convert parallel data into serial data?
A. Parallel In/Serial Out shift register
B. Serial In/Parallel Out shift register
C. Universal shift register
D. Ring counter
Correct Answer:
A
Chapter: 35
Q705:
In an Asynchronous Serial data transmission, how many bits are transmitted to send one character?
A. 8
B. 10
C. 11
D. 12
Correct Answer:
C
Chapter: 35
Q706:
What is the function of the start bit in serial data transmission?
A. Indicates end of data transmission
B. Indicates idle state of the line
C. Indicates beginning of data transmission
D. Starts the clock generator
Correct Answer:
C
Chapter: 35
Q707:
How many stop bits are typically used in an 11-bit serial data format?
A. 1
B. 2
C. 3
D. 4
Correct Answer:
B
Chapter: 35
Q708:
What triggers the J-K flip-flop in a Serial-to-Parallel converter circuit?
A. Stop bit
B. Clock pulse
C. Start bit
D. Data bit
Correct Answer:
C
Chapter: 35
Q709:
In a Keyboard Encoder, what does the ring counter in the scanning circuit select?
A. Column
B. Row
C. Keycode
D. Scan code
Correct Answer:
B
Chapter: 35
Q710:
What happens when a key is pressed in a keyboard encoder circuit?
A. The corresponding row becomes logic 0
B. The corresponding column becomes logic 0
C. The ring counter resets
D. The clock stops
Correct Answer:
B
Chapter: 35
Q711:
How is a PLD device configured for Sequential operation?
A. Using Combinational Logic Mode
B. By setting the OLMC to Registered Mode
C. By programming external memory
D. By adjusting the MUX inputs
Correct Answer:
B
Chapter: 35
Q712:
What does setting the S1 and S0 select inputs to 01 configure in a PLD?
A. Combinational Mode
B. Sequential Mode
C. Registered Active-low Mode
D. Registered Active-high Mode
Correct Answer:
D
Chapter: 35
Q713:
What is the purpose of the ISTYPE statement in a PLD device?
A. Assigns clock inputs
B. Declares input as Registered or Combinational
C. Configures memory allocation
D. Adjusts power levels
Correct Answer:
B
Chapter: 35
Q714:
Which operator is used in logic descriptions to indicate a Registered output?
A. :=
B. :>
C. =
D. &
Correct Answer:
A
Chapter: 35
Q715:
What does the ‘.CLK’ extension in an ABEL statement indicate?
A. Clear signal
B. Inverted output
C. Clocked flip-flop
D. Enable input
Correct Answer:
C
Chapter: 35
Q716:
What is an 8-bit Serial In/Parallel Out shift register used for?
A. Parallel data storage
B. Serial data output
C. Serial data input
D. Converting serial data to parallel data
Correct Answer:
D
Chapter: 35
Q717:
How is the clear signal used in an 8-bit Serial In/Parallel Out shift register?
A. To enable the shift register
B. To clear all flip-flops asynchronously
C. To start data input
D. To set the clock signal
Correct Answer:
B
Chapter: 35
Q718:
What type of output does the Q0 output in an ABEL statement represent?
A. Active-low
B. Active-high
C. Inverted output
D. Enable output
Correct Answer:
B
Chapter: 35
Q719:
What operation does the first vector specify in the test vectors of an ABEL file?
A. Inhibits the shift operation
B. Resets the counter
C. Shifts in logic 1
D. Clears the register
Correct Answer:
D
Chapter: 35
Q720:
In a 4-bit Parallel In/Serial Out shift register, what is the purpose of the SHLD input?
A. Shift data
B. Load data
C. Clear register
D. Enable clock
Correct Answer:
B