System Programming MCQs with Answers
Practice important System Programming MCQs with answers and explanations.
Multiple Choice Questions
Q2861: Data movement within a core's registers typically costs ________.
- A: Tens of cycles
- B: Zero cycles
- C: Less than one cycle
- D: Hundreds of cycles
View Answer
C
Q2862: Data transfer between cores through main memory is ________ than within a core.
- A: Slower
- B: Faster
- C: Same speed
- D: Irrelevant
View Answer
A
Q2863: Memory barriers help maintain ________ across multiple processor cores.
- A: Instruction cycles
- B: Cache coherency
- C: Thread count
- D: Disk usage
View Answer
B
Q2864: Cache coherency is not fully ensured by using ________ alone.
- A: L1 cache
- B: Shared memory
- C: Volatile qualifier
- D: Heap memory
View Answer
C
Q2865: Each core in a dual-core chip architecture usually has ________ cache for instructions and data.
- A: Shared
- B: Level-2
- C: Individual Level-1
- D: Dynamic
View Answer
C
Q2866: Which memory level is common among all cores on the same chip?
- A: L0
- B: L1
- C: L2
- D: L3
View Answer
C
Q2867: Memory barriers are necessary for ________ systems.
- A: Single-threaded
- B: Multi-core
- C: Static
- D: Batch
View Answer
B
Q2868: Processor cores might see values in a different order without using ________.
- A: Stack memory
- B: Volatile
- C: Memory barriers
- D: Mutexes
View Answer
C
Q2869: Updating a variable in core 0 does not ensure immediate visibility in core 3 without ________.
- A: Shared pointers
- B: Paging
- C: Memory fence
- D: Virtualization
View Answer
C
Q2870: Interlocked functions are used to implement ________.
- A: Memory barriers
- B: Deadlock prevention
- C: Paging mechanisms
- D: Registers
View Answer
A