Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Multiple Choice Questions
Q681: In the Karnaugh Map for D flip-flop inputs of the second state assignment, what is the expression for D1?
- A: Q2 + Q0X + Q1Q0
- B: Q2Q0 + Q1Q0 + Q1X
- C: Q2Q1Q0X + Q1Q0X
- D: Q1Q0X + Q2Q0X + Q1Q0
View Answer
A
Q682: What is the primary function of a shift register?
- A: Store data
- B: Perform arithmetic
- C: Perform logical operations
- D: Provide power
View Answer
A
Q683: How does a Serial In/Shift Right/Serial Out shift register work?
- A: Data is shifted left
- B: Data is shifted right
- C: Data is shifted in parallel
- D: Data is shifted out in parallel
View Answer
B
Q684: How many clock pulses are needed to shift a 4-bit data completely out of a Serial In/Shift Right/Serial Out register?
- A: 4
- B: 8
- C: 16
- D: 32
View Answer
B
Q685: In a Serial In/Shift Left/Serial Out operation, data enters from which side?
- A: Left
- B: Right
- C: Center
- D: Bottom
View Answer
B
Q686: What type of shift operation involves moving data left or right in a register?
- A: Serial operation
- B: Parallel operation
- C: Bidirectional operation
- D: Asynchronous operation
View Answer
C
Q687: How is a Bi-directional Shift Register controlled?
- A: By setting clock signals
- B: By setting RIGHT/LEFT signals
- C: By enabling CLR input
- D: By applying parallel inputs
View Answer
B
Q688: The key advantage of using CMOS technology is its low power consumption and ________
- A: High speed
- B: High noise margin
- C: High reliability
- D: High integration density
View Answer
B
Q689: What does the 74HC164 shift register do?
- A: Serial In/Parallel Out
- B: Parallel In/Serial Out
- C: Serial In/Serial In
- D: Parallel In/Parallel Out
View Answer
A
Q690: How is the 74HC164 shift register cleared?
- A: By applying a high signal to CLR
- B: By applying a low signal to CLR
- C: By applying a clock pulse
- D: By enabling the SHIFT input
View Answer
B