Digital Logic and Design MCQs with Answers
Practice important Digital Logic and Design MCQs with answers and explanations.
Multiple Choice Questions
Q1: In the binary number “10011” the weight of the most significant digit is
- A: 2^4
- B: 2^3
- C: 2^0
- D: 2^1
View Answer
A
Q2: An S-R latch can be implemented by using _________ gates
- A: AND, OR
- B: NAND, NOR
- C: NAND, XOR
- D: NOT, XOR
View Answer
B
Q3: A latch has _____ stable states
- A: One
- B: Two
- C: Three
- D: Four
View Answer
B
Q4: The ABEL symbol for “XOR” operation is
- A: $
- B: #
- C: !
- D: &
View Answer
B
Q5: Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
- A: A parallel to serial converter circuit
- B: A counter circuit
- C: A BCD to Decimal decoder
- D: A 2-to-8 bit decoder
View Answer
B
Q6: The device shown here is most likely a
- A: Comparator
- B: Multiplexer
- C: Demultiplexer
- D: Parity generator
View Answer
B
Q7: The main use of the Multiplexer is to
- A: Select data from multiple sources and to route it to a single Destination
- B: Select data from Single source and to route it to a multiple Destinations
- C: Select data from Single source and to route to single destination
- D: Select data from multiple sources and to route to multiple destinations
View Answer
A
Q8: A logic circuit with an output consists of ________.
- A: two AND gates, two OR gates, two inverters
- B: three AND gates, two OR gates, one inverter
- C: two AND gates, one OR gate, two inverters
- D: two AND gates, one OR gate
View Answer
B
Q9: The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
- A: 4
- B: 8
- C: 12
- D: 16
View Answer
B
Q10: The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol’+’ here represents OR Gate.
- A: Undefined
- B: One
- C: Zero
- D: 10 (binary)
View Answer
B