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Advanced Computer Architecture MCQs with Answers

Practice important Advanced Computer Architecture MCQs with answers and explanations.

Multiple Choice Questions

Q571: Which type of transfer between CPU and I/O devices involves sending bits one by one?
  • A: Serial
  • B: Parallel
  • C: Half-duplex
  • D: Full-duplex
View Answer
A

Q572: Which signal is activated to latch incoming data during an asynchronous transfer?
  • A: Enable
  • B: Ready
  • C: Acknowledge
  • D: Complete
View Answer
C

Q573: In serial communication, what is used to synchronize transmission in synchronous mode?
  • A: Sync characters
  • B: Start bits
  • C: Stop bits
  • D: Parity bits
View Answer
A

Q574: What is the purpose of an I/O port?
  • A: To manage input/output data
  • B: To connect I/O devices to the computer bus
  • C: To act as a CPU cache
  • D: To store addresses
View Answer
B

Q575: Which bus is used to connect the CPU to I/O devices indirectly?
  • A: Data bus
  • B: Peripheral bus
  • C: Address bus
  • D: Memory bus
View Answer
B

Q576: In an I/O read cycle, what does the CPU expect from the selected input device?
  • A: Data
  • B: Control signals
  • C: Address
  • D: Voltage
View Answer
A

Q577: What must be matched in I/O port design to ensure proper communication with the CPU?
  • A: Voltage and frequency
  • B: Voltage and current
  • C: Logic levels and timing
  • D: Data size
View Answer
C

Q578: What are the two main functions built into I/O ports?
  • A: Address decoding and data capturing
  • B: Data transfer and voltage regulation
  • C: Memory allocation and data isolation
  • D: CPU control and power management
View Answer
A

Q579: What is the function of an address decoder in an I/O port?
  • A: To generate an address for the CPU
  • B: To decode system bus data
  • C: To ensure each port has a unique address
  • D: To store data in registers
View Answer
C

Q580: What type of logic circuit is used for address decoding?
  • A: Sequential logic
  • B: Combinational logic
  • C: Arithmetic logic
  • D: Memory circuit
View Answer
B

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