Advanced Computer Architecture MCQs with Answers
Practice important Advanced Computer Architecture MCQs with answers and explanations.
Multiple Choice Questions
Q431: Which step is responsible for loading the Memory Address Register (MAR) during instruction fetch?
- A: T0
- B: T1
- C: T2
- D: T3
View Answer
A
Q432: What is the purpose of a reset operation in a processor?
- A: To execute the next instruction
- B: To modify memory contents
- C: To reload the PC to a predefined value
- D: To interrupt the current process
View Answer
C
Q433: In a 3-bus SRC implementation, what is bus 'C' used for?
- A: Reading from memory
- B: Writing to memory
- C: Writing to registers
- D: Executing instructions
View Answer
C
Q434: Which of the following steps happens in time step T1 during instruction fetch?
- A: MAR receives the value of the PC
- B: Instruction is executed
- C: The value of PC is incremented by 2
- D: Memory word is indexed by the MAR
View Answer
A
Q435: In a soft reset, which component is initialized in the SRC?
- A: PC only
- B: General Registers only
- C: Interrupt flags only
- D: PC and General Registers
View Answer
A
Q436: What does a hard reset initialize in the SRC?
- A: Only the program counter (PC)
- B: General registers and program counter
- C: Condition code register
- D: Memory registers
View Answer
B
Q437: The instruction 'sub ra, rb, rc' in a 3-bus implementation results in:
- A: Addition of rb and rc
- B: Subtraction of rc from rb
- C: Multiplication of ra and rb
- D: Division of rc by ra
View Answer
B
Q438: What does the exception vector contain?
- A: Address of the interrupting process
- B: The data being interrupted
- C: The address of the exception handler
- D: The reason for the exception
View Answer
C
Q439: Which of the following is an external exception?
- A: Machine Check
- B: Instruction Access Exception
- C: Privileged Instruction Exception
- D: Trace Exception
View Answer
A
Q440: What happens in step T2 of instruction execution?
- A: PC is initialized
- B: Memory data is transferred to the instruction register
- C: General registers are reset
- D: Interrupt flags are cleared
View Answer
B